Removable memory cartridge system for use with a server or other processor-based device

ABSTRACT

A processor-based device having a plurality of memory cartridges secured within a chassis by a lever system. The processor-based device comprises an indication system to indicate memory system operating conditions. Each memory cartridge has a protective assembly to protect memory elements within the memory cartridge when the memory cartridge is removed from the processor-based device. The processor-based device is operable such that at least one memory cartridge may be removed from the processor-based device without affecting operation of the processor-based device.

BACKGROUND OF THE INVENTION

[0001] This application claims priority based on Provisional ApplicationNo. 60/177,838, filed Jan. 25, 2000 and hereby incorporates by referenceProvisional Application No. 60/177,838, filed on Jan. 25, 2000.

FIELD OF THE INVENTION

[0002] The present invention relates generally to a processor-basedsystem, such as a server, and particularly to such a system designed toutilize memory cartridges that are removable/replaceable during use ofthe overall system.

BACKGROUND OF THE INVENTION

[0003] In certain computer-based systems, such as servers, there may beitems that require upgrades, repair or replacement. For example, serverscommonly use a plurality of memory modules that must be upgraded orreplaced periodically. In conventional systems, the server is shut downwhile the appropriate memory modules are removed or replaced. This canbe problematic when the server or other computer-based system isutilized in an application that requires or benefits from continuousoperation. Accordingly, it would be advantageous to design a system thatpermitted upgradeable/replaceable items, such as memory modules, to bemounted on a plurality of removable cartridges. Such cartridges would bedesigned to permit at least one cartridge to be removed withoutinterrupting the operation of the overall server or other device. Thus,memory modules, for example, could be upgraded or replaced while theserver continues to run.

SUMMARY OF THE INVENTION

[0004] The present invention features an overall system that utilizes aplurality of “hot pluggable” cartridges in, for example, a server. Thepresent invention also encompasses a variety of subsystems thatfacilitate operation of the overall cartridge-based system.

[0005] According to one aspect of the present invention, an electronicdevice having removable memory cartridges is featured. The electronicdevice has a chassis and a processor housed within the chassis. Inaddition, the device has a plurality of memory cartridges that aresecurable to the chassis. The memory cartridges are electricallycoupleable to the processor. Furthermore, at least one of the memorycartridges may be removed from the chassis during operation of thedevice.

[0006] According to another aspect of the present invention, anelectronic device having removable memory cartridges is featured. Theelectronic device has a chassis. In addition, the device has a pluralityof memory cartridges. The plurality of memory cartridges are removablefrom the chassis. Additionally, each memory cartridge is adapted tohouse at least one memory module. The device also has a plurality ofgear systems. Each of the gear systems is operable to install or removea memory cartridge from the front of the device.

[0007] According to another aspect of the present invention, anelectronic device is featured. The electronic device has an enclosure, aprocessor, a memory system, and an indication system. The memory systemutilizes a plurality of removable memory cartridges that areelectrically coupleable to the processor. The indication system providesan indication of at least one operating condition for the memory system.

[0008] According to another aspect of the present invention, a method ofoperating a processor-based device is featured. The method of operatinga processor-based device comprises storing data in a memory system. Thememory system having a plurality of memory modules disposed within aplurality of removable memory cartridges. The method also comprisesoperating the memory system to store data redundantly among theplurality of memory cartridges, such that at least one memory cartridgeis removable from the device without securing operation of the device.

[0009] According to another aspect of the present invention, a method ofassembling a server is featured. The method of assembly comprisessecuring a chassis to a mounting device and inserting a plurality ofmemory cartridges into the chassis.

BRIEF DESCRIPTION OF THE DRAWINGS

[0010] The invention will hereafter be described with reference to theaccompanying drawings, wherein like reference numerals denote likeelements, and:

[0011]FIG. 1 is a block diagram of a processor-based device;

[0012]FIG. 2 is a perspective view of a processor-based device,according to an exemplary embodiment of the present invention;

[0013]FIG. 3 is a front elevational view of the processor-based deviceof FIG. 2;

[0014]FIG. 4 is a front perspective view of the interior of theprocessor-based device of FIG. 2;

[0015]FIG. 5 is a rear perspective view of the interior of theprocessor-based device of FIG. 4;

[0016]FIG. 6 is a perspective view of a removable memory cartridge beingremoved from a processor and memory module, according to an exemplaryembodiment of the present invention;

[0017]FIG. 7 is a perspective view of a removable memory cartridge shownremoved from the processor and memory module of FIG. 6;

[0018]FIG. 8 is a perspective view of a memory cartridge duringassembly, this view illustrating the installation of a protectiverollbar;

[0019]FIG. 9 is a perspective view of a memory cartridge duringassembly, this view illustrating the installation of memory modulesmounted on a circuit board;

[0020]FIG. 10 is a perspective view of a memory cartridge duringassembly, this view illustrating the pivoting of the rollbar to installthe circuit board;

[0021]FIG. 11 is a perspective view of a memory cartridge duringassembly, this view illustrating the circuit board being disposed undera securing lip;

[0022]FIG. 12 is a cross-sectional view taken generally along line 12-12of FIG. 11;

[0023]FIG. 13 is a perspective view of an alternative embodiment of amemory cartridge, the memory cartridge having a pivotable protectivecover, according to an exemplary embodiment of the present invention;

[0024]FIG. 14 is a perspective view of the memory cartridge of FIG. 13with the pivotable protective cover in the closed position;

[0025]FIG. 15 is a perspective view of the memory cartridge of FIG. 13illustrating the insertion of a memory module into the memory cartridge;

[0026]FIG. 16 is a top elevational view of the memory cartridge of FIG.13;

[0027]FIG. 17 is a perspective view of an individual lever system usedto remove and install a memory cartridge from the processor and memorymodule, according to an exemplary embodiment of the present invention;

[0028]FIG. 18 is a side view of the lever system illustrated in FIG. 17showing the handle in a release position;

[0029]FIG. 19 is an enlarged view of a latch mechanism of the leversystem illustrated in FIG. 18;

[0030]FIG. 20 is a side view of the lever system illustrated in FIG. 17with the handle in a retain position;

[0031]FIG. 21 is a side view of the latch mechanism illustrated in FIG.20 but showing release of the handle;

[0032]FIG. 22 is a perspective view of the pinion gear engaged with therack gear;

[0033]FIG. 23 is a perspective view of the pinion gear receivingportion;

[0034]FIG. 24 is a cross-sectional view taken generally along line 24-24of FIG. 20;

[0035]FIG. 25 is a perspective view of the lever system illustrated inFIG. 17 with the addition of a release prevention mechanism;

[0036]FIG. 26 is a perspective view similar to FIG. 25 showing therelease prevention mechanism in a hold or locked position.

[0037]FIG. 27 is a front elevational view of a memory riser board,according to an exemplary embodiment of the present invention;

[0038]FIG. 28 is a top view of a host board, according to an exemplaryembodiment of the present invention;

[0039]FIG. 29 is a front elevational view of a processor board,according to an exemplary embodiment of the present invention;

[0040]FIG. 30 is a perspective view of the front of a midplane board,according to an exemplary embodiment of the present invention;

[0041]FIG. 31 is a perspective view of the rear of a midplane board,according to an exemplary embodiment of the present invention;

[0042]FIG. 32 is a rear elevational view of an IO board, according to anexemplary embodiment of the present invention;

[0043]FIG. 33 is a detailed view of IO connectors of the IO board ofFIG. 32;

[0044]FIG. 34 is a schematic of a hot plug memory interface, accordingto an exemplary embodiment of the present invention;

[0045]FIG. 35 is a schematic of an alarm and indication system,according to an exemplary embodiment of the present invention;

[0046]FIG. 36 is a state table for the cartridge power LED, according toan exemplary embodiment of the present invention;

[0047]FIG. 37 is a state table for the cartridge attention LED,according to an exemplary embodiment of the present invention;

[0048]FIG. 38 is a state table for the DIMM status LEDs, according to anexemplary embodiment of the present invention;

[0049]FIG. 39 is a state table for unique combinations of the cartridgeattention LED, the cartridge power LED and the DIMM status LEDs,according to an exemplary embodiment of the present invention;

[0050]FIG. 40 is a perspective view of a chassis being inserted into arack system for further assembly of the processor-based device; and

[0051]FIG. 41 is a perspective view of a processor and media module,according to an exemplary embodiment of the present invention.

DESCRIPTION OF EXEMPLARY EMBODIMENTS OF THE INVENTION

[0052] Referring generally to FIG. 1, a block diagram is illustrateddepicting an exemplary electronic device, generally designated by thereference numeral 50. Electronic device 50 may be any of a variety ofdifferent types, such as a server, a personal organizer, a notebookcomputer, a personal computer, a workstation, an Internet server, aminicomputer, etc. In a typical electronic device, a processor controlsmany of the functions of the device. In the illustrated embodiment,processor 52 controls the functions of electronic device 50.

[0053] Electronic device 50 typically includes a power supply 54. Ifdevice 50 is portable, power supply 54 includes permanent batteries,replaceable batteries, and/or rechargeable batteries. Power supply 54may also include an A/C adapter, so that the device may be plugged intoa wall outlet, for instance. In fact, power supply 54 may also include aD/C adapter, so that device 50 may be plugged into the D/C voltage of avehicle.

[0054] Various other devices may be coupled to processor 52, dependingupon the functions that device 50 performs. For example, a userinterface 56 may be coupled to processor 52. Examples of user interfaces56 include buttons, switches, a keyboard, a light pen, a mouse, and/or avoice recognition system. A display 58 may also be coupled to processor52. Examples of displays 58 include: a television screen, a computermonitor, LEDs, or even an audio display. A communications port 60 mayalso be coupled to processor 52. Communications port 60 may be adaptedto be coupled to a peripheral device 62, such as a printer, a computeror an external modem.

[0055] Typically, processor 52 utilizes programming to control thefunction of device 50. Memory is coupled to processor 52 to store andfacilitate execution of the programming. For example, processor 52 maybe coupled to a volatile memory 64 and a non-volatile memory 38.Nonvolatile memory 38 may include a read only memory (ROM), such as anEPROM, to be used in conjunction with volatile memory 64. The size ofthe ROM is typically selected to be just large enough to store anynecessary operating system, application programs, and fixed data.Volatile memory 64, on the other hand, is typically quite large so thatit can store dynamically loaded applications. Additionally, nonvolatilememory 38 may include a high capacity memory such as a disk or tapedrive memory.

[0056] A variety of memory modules, such as DRAMs, SDRAMs, SRAMs, etc.can be utilized for a given device or application. The memory modulesmay be customized for a specific device or be in a standard form widelyused in the electronic industry. For example, an SDRAM may be packagedas an industry standard dual inline memory module (DIMM). The presentprotective assembly, discussed below, is particularly amenable toprotecting electric components such as memory modules that are utilizedin, for example, a server.

[0057] Referring generally to FIG. 2, an exemplary processor-baseddevice 68 is illustrated. In the exemplary embodiment, processor-baseddevice 68 comprises a chassis 70 configured to house the components ofprocessor-based device 68. Chassis 70 may be secured to a rack, or othersecuring system, by, for example, mounting screws 72. Processor-baseddevice 68 is configured with several modules that are housed and coupledtogether within chassis 70. The modules enable the system to be moreeasily assembled and repaired. One exemplary module is a processor andmemory module 74. Another exemplary module is a media module 76.

[0058] In the illustrated embodiment, the processor and memory module 74utilizes five memory cartridges 78. Memory elements, such as DRAMs andSDRAMs, are housed within each of the memory cartridges 78. Memorycartridges 78 are installed and removed from the front 80 of chassis 70.In the illustrated embodiment, the storage capacity of memory within thefive memory cartridges is sufficient to enable data to be storedredundantly in memory modules among a plurality of memory cartridges,enabling a memory cartridge to be removed without suffering a loss ofoperation of the device. Additionally, in the illustrated embodiment,the memory cartridges are hot-pluggable, i.e., a memory cartridge 78 maybe removed from device 68 without having to secure power or haltoperation of device 68.

[0059] In the illustrated embodiment, media module 76 may include anumber of hard drives 82, a CD-Rom 84, and a disc drive 86. CD-Rom 84may be a CD player, able to write CDs or rewrite CDs. Media module 76also has a control panel 88 for controlling the operation ofprocessor-based device 68. Additionally, power switch 90, which controlspower to device 68 is located on media module 76 in this embodiment.Chassis 70 also includes two handles 92 located on opposite sides ofprocessor-based device 68. Handles 92 may be used to moveprocessor-based device 68.

[0060] Referring generally to FIG. 3, processor-based device 68 may besecured to a rack 94. Additionally, a first pair of securing levers 96is used to secure processor and memory module 74 to chassis 70. A secondpair of levers 98 is used to secure media module 76 to chassis 70.

[0061] An alarm and indication system is used to provide an operatorwith information regarding the status of various components withinprocessor-based device 68. For example, in the illustrated embodiment,each memory cartridge 78 has a cartridge power light 100 and a cartridgeattention light 102. Additionally, each memory element socket withineach memory cartridge 78 has a corresponding DIMM status light 104. Inthe illustrated embodiment, there are eight memory elements within eachmemory cartridge 78. Each DIMM status light 104 is configured in theshape of a number, one through eight, corresponding to the memoryelement sockets. An audible alarm is operable to sound when certainoperating conditions are present, such as improperly attempting toremove a memory cartridge.

[0062] Additionally, the status of various subsystems withinprocessor-based device 68 is indicated by a visible indicator. Forexample, there is a host board indicator 106, a media board indicator108, an IO board indicator 110, a riser board indicator 112, as well astwo SCSI bus indicators 114, two processor board indicators 115, and twofan indicators 116.

[0063] As best illustrated in FIG. 4, in addition to processor andmemory module 74 and media module 76, processor-based device 68 alsoutilizes input/output (“IO”) module 118. IO module 118 is configured tohouse a plurality of PCI cards 120 for connecting processor-based device68 to other devices.

[0064] In the illustrated embodiment, two processor boards 122 are usedto perform the processing functions. In this embodiment, a plurality ofprocessors are disposed on each processor board 122. Processor boards122 and the other components within chassis 70 are cooled by two fans124 that pull air into and through the interior of chassis 70.

[0065] Referring generally to FIG. 5, PCI cards 120 may be accessed fromthe rear of processor-based device 68. Additional IO connectors 126 maybe accessed from the rear of processor-based device 86. Space isprovided for modular power supplies (not shown) to be inserted intochassis 70.

[0066] Referring generally to FIG. 6 and 6A, the plurality of memorycartridges 78 are configured such that they may be accessed withouttools and without the need to disassemble chassis 70. In the illustratedembodiment, each memory cartridge 78 utilizes lever 128 that cooperateswith processor and memory module 74 to facilitate both insertion andremoval of the corresponding memory cartridge. The processor-baseddevice 68 is configured so that removal of any individual memorycartridge 78 does not interrupt operation. However, as discussed above,an alarm and indication system is employed to ensure against theunintentional removal of a memory cartridge. Additionally, a lockingswitch 130 is used to fix the lever 128 in a secured position so as tomake it more difficult to inadvertently remove a memory cartridge.

[0067] Referring generally to FIG. 7, an exemplary memory cartridge 78is illustrated. Memory cartridge 78 is designed to receive a PC board towhich memory modules, such as industry standard DIMMs, are mounted.Memory cartridge 78 includes a base 202 and a rollbar 204. Base 202 androllbar 204 protect electronic components within memory cartridge 78from damage. Base 202 includes a primary base region 202A and asecondary base region 202B that extends generally transversely, e.g.perpendicularly, from primary base region 202A. Rollbar 204 also extendsgenerally transversely from primary base region 202A in the same generaldirection as secondary base region 202B. Effectively, secondary baseregion 202B acts as a second rollbar spaced from rollbar 204.

[0068] In the illustrated embodiment, a memory module 206, e.g. a DIMM,is mounted in a socket 208. Socket 208 is, in turn, mounted on printedcircuit board 210, hereinafter referred to as a “daughterboard”.Conductive traces 212 on daughterboard 210 electrically couple memorymodule 206 to conductive strips 214 along an edge of daughterboard 210.Daughterboard 210 is installable into electrical connector 216.Electrical connector 216 is mounted on a second printed circuit board218, hereinafter referred to as a “motherboard.”

[0069] Motherboard 218 serves to secure daughterboard 210 into memorycartridge 78 and to electrically couple daughterboard 210 to device 20.Edge connectors 216 contain conductive elements that contact conductivestrips 214. Motherboard 218 also has conductive traces 220 thatelectrically couple electrical connector 216 to a multi-pin connector222. Multi-pin connector 222 is, in turn, electrically coupleable to arespective multi-pin connector disposed within the electronic device.Thus, when the multi-pin connectors are joined, a conductive path frommemory module 206 through memory cartridge 78 to electronic device 20 iscompleted.

[0070] Connector 216 also mechanically secures daughterboard 210 tomotherboard 218. Daughterboard 210 may be manufactured with smallnotches 224 on the sides. Clips 226 of electrical connector 216 fit intothe notches, holding daughterboard 210 securely within electricalconnector 216. Each clip 226 has a thumb release 228 that, whenoperated, pulls the clip from the corresponding notch 224, allowing thesubject daughterboard to be removed from the electrical connector 216.

[0071] Secondary base region 202B includes a grill 230 disposed at apredetermined distance from rollbar 204 to protect the memory modules206. Grill 230 and rollbar 204 extend from the base 202 and above orbeyond the electrical components 206 located on daughterboard 210. Thus,if memory cartridge 78 inadvertently strikes an object, such as thefloor or a desktop, either base 202 or rollbar 204 tends to absorb theimpact rather than daughterboard 210 or memory module 206. Additionally,base 202 and rollbar 204 are constructed with tabs 232 to protectmulti-pin connector 222. Thus, multi-pin connector 222 will not strikethe ground first if memory cartridge 78 is dropped. It should be notedthat grill 230 may be constructed with ventilation holes 233 to allowair to cool memory module 206 or the grill may be removed altogether,depending on the application.

[0072] Rollbar 204 is attached to base 202 with a pin-and-socket system.Rollbar 204 includes a pair of outwardly extending pins 234, while base202 includes a pair of corresponding sockets or apertures 236. Pins 234are pivotably disposed in sockets 236, allowing the rollbar 204 to pivotduring the assembly process.

[0073] Motherboard 218 is secured to memory cartridge 78 by a lip 238extending from the base of grill 230. The motherboard 218 is furthersecured by a pair of base side walls 240 extending generallyperpendicular to both motherboard 218 and a support wall 241 of base 202that connects side walls 240. Motherboard 218 also is secured by one ormore fasteners, such as a pair of screws 242 inserted through twocorresponding holes 244 in motherboard 218. Lip 238 and screws 242prevent movement of motherboard 218 in one axial direction, while theside walls 240 of base 202 prevent lateral movement. A pair of boardguides 246 in rollbar 204 are sized to slidably receive and furthersupport motherboard 218.

[0074] Once removed from the device, new DIMMs can be added to memorycartridge 78 to upgrade or replace the device's memory. The exemplarydevice 20 includes multi-pin connector 252 configured to mate withmulti-pin connector 222 of memory cartridge 78. Preferably, chassis 248and memory cartridge 78 are configured so that the multi-pin connectorsare properly aligned and mated when memory cartridge 78 is inserted intochassis 248.

[0075] Referring generally to FIGS. 8-12, the process of assembling amemory cartridge 78 is illustrated. As best illustrated in FIG. 8,during assembly, rollbar 204 initially is pivotably secured to base 202by, for example, receipt of two pins 234 in corresponding sockets 236.Rollbar 204 is manufactured from a material, such as plastic, thatrequires a relatively small force to compress the rollbar 204 so thatpins 234 can be inserted in the sockets 236. The pin-and-socketarrangement allows the pins 234 to rotate within the sockets 236, thusallowing the rollbar 204 to pivot. Screws 242 are threaded intocorresponding sockets 254 disposed on support wall 241 of base 202.

[0076] As best illustrated in FIG. 9, the rollbar 204 also serves tofacilitate the installation of motherboard 218 and a plurality ofdaughterboards 210 into the memory cartridge 78. After connectingrollbar 204 to base 202, rollbar 204 is pivoted clockwise to permitinsertion of motherboard 218 into board guides 246. The daughterboards210 may be inserted prior to insertion of motherboard 218 into guides246 or at a later stage. As best illustrated in FIG. 10, after receivingmotherboard 218 in board guides 246, rollbar 204 and motherboard 218 arepivoted counterclockwise, along arrow 255 to position motherboard 218against base 202.

[0077] As best illustrated in FIG. 11, once motherboard 218 is placedagainst base 202, motherboard 218 is moved towards secondary base region202B along arrow 256. Lip 238, as best illustrated in FIG. 12, holds theedge of motherboard 218 adjacent grill 232 against base 202. Two screws242 threaded into sockets 254 further secure motherboard 218 to base202. If not added previously, daughterboards 210 may be disposed withinthe electrical connectors 216 on motherboard 218 at this time. Theprotective assembly is now ready for insertion into electronic device20.

[0078] Referring generally to FIG. 13, an alternative embodiment isshown for a memory cartridge. Memory cartridge 260 includes a base 262and a cover 264. In this embodiment, cover 264 also provides protectionto the memory elements from sharp objects and non-planar surfaces, suchas the edge of a table.

[0079] Base 262 has a front protective wall 266 that may be in the formof a grill. A motherboard 268, including an electrical connector 222, isdisposed onto base 262. Memory modules 272, such as industry standardDIMMs, are disposed onto a daughterboard 274. In the illustratedembodiment, each daughterboard 274 is disposed in an angled board holder276 to lower the profile of protective assembly 260. As best illustratedin FIG. 15, each daughterboard 274 is inserted into each boardholder 276at an angle of less than ninety degrees, as indicated by arrow 277,rather than upright.

[0080] Referring again to FIG. 14, cover 264 is secured to base 262 witha pin-and-socket system. In the illustrated embodiment, cover 264 hastwo pins 278, which fit into two sockets 280 in base 262. Pins 278 arefree to rotate within the sockets 280, allowing cover 264 to pivot.Cover 264 also has a latch 282 which can be used to secure the cover toa catch 284 on grill 266. A spring element 286 on cover 264 iscompressed against base 262 when cover 264 is latched, as shown in FIG.10. When latch 282 is removed from catch 284 the energy stored in springelement 286 acts to spring open the cover 264. Ventilation holes 288 incover 264 allow air to flow over and cool electronic components 272.

[0081] As illustrated, memory cartridge 260 includes a latch mechanismto secure memory cartridge 260 within chassis 70. The latch mechanismincludes a pawl 290 and an operator 292. As operator 292 is turned itcauses pawl 290 to rotate, engaging the pawl 290 against a respectivecatch in the processor and memory module 74. Operator 292 is rotated todisengage pawl 290 in order to remove memory cartridge 260 from thedevice. When cover 264 is closed, the protective cartridge is ready forinstallation into an electronic device.

[0082] Referring generally to FIG. 16, in the illustrated embodiment,eight DIMMs 272 are disposed onto daughterboards 274 placed into boardholders 276. The eight boardholders 276 in each cartridge correspond toeight supported banks of memory in the memory array. Each boardholder276 corresponds to one of the banks of the system's memory. Boardholder276A corresponds to the first bank, boardholder 276B corresponds to thesecond bank, boardholder 276C corresponds to the third bank, boardholder276D corresponds to the fourth bank, boardholder 276E corresponds to thefifth bank, boardholder 276F corresponds to the sixth bank, boardholder276G corresponds to the seventh bank, and boardholder 276H correspondsto the eighth bank. A bank of memory consists of all memory modules inthe same boardholder bank in the five cartridges. For example, allmemory modules in boardholder 276A in each of the five cartridges makeup bank 1.

[0083] The memory cartridge 266 couples the DIMMs to a memory controller578. The memory controllers 578 are, in turn, coupled to electricalconnector 222. The memory controller controls the transfer of data toand from the DIMMS. An error checking and correcting algorithm may beused to detect and correct, if possible, errors in the transfer of datato and from a DIMM. If the error is not correctable, the memorycontroller may produce an error signal.

[0084] In the exemplary embodiment, each cartridge in the system has thesame memory configuration. The system may be configured so that a DIMMconfiguration error will result, as indicated by a blinking DIMM statusLED, when each cartridge does not have the same memory configuration.Additionally, the system may be configured so that the cartridge willnot be brought on-line until the error is cleared.

[0085] Referring generally to FIG. 17, each memory cartridge is moveablerelative to chassis 70. In the particular embodiment illustrated, eachmemory cartridge may be electrically and mechanically engaged anddisengaged from chassis 70. For example, each memory cartridge isconfigured for connection to riserboard within chassis 70 across a plugconnector 406, as best illustrated in FIG. 18. A typical connector 406includes a multipin plug portion 408 connected as part of chassis 70 anda corresponding plug portion 410 connected as part of first object 402.Plug portions 408 and 410 typically are electrically and mechanicallyinterconnected via a plurality of pins 412. Generally, a greater numberof pins in the multipin connector, requires greater force to engage ordisengage plug portions 408 and 410. Hence, a lever system 414 is usedto facilitate movement of each first object 402 with respect to chassis70 which, in the illustrated example, permits the plugging andunplugging of connector 406.

[0086] Referring generally to FIGS. 18 through 21, an exemplaryembodiment of lever system 414 is illustrated. Lever system 414 includesa pinion gear 416 pivotably mounted to first object 402 for pivotablemotion about a pivot axis 418. Pinion gear 416 is designed to engage apinion gear reception portion 420 mounted to chassis 70. Receptionportion 420 includes a slot 426 into which pinion gear 416 may berotated.

[0087] If chassis 70 is a cabinet or chassis as illustrated in FIG. 17,reception portion 420 can be mounted to an interior wall 422 illustratedin cut-away form in FIG. 18. Pinion gear reception portion 420potentially is mounted to chassis 70 in a variety of ways. For example,reception portion 420 may be molded as a unitary piece with the secondobject. Other methods include adhesives, fasteners, or a plurality ofpins 424 that may be interference fit or heat sealed in correspondingopenings in chassis 70.

[0088] A handle or lever 428 is connected to pinion gear 416. Anexemplary embodiment of handle 428 utilizes a stem 430 and a grippingportion 432 disposed at an opposite end of stem 430 from pinion gear416. Handle 420 preferably also includes a notch 434 and a spring member436, as best illustrated in FIG. 18.

[0089] Pinion gear 416 may be engaged with pinion gear reception portion420 and, along with handle 428, rotated between an open or releaseposition, as illustrated in FIG. 18, and a closed or retain position, asillustrated in FIG. 20. In the release position, first object 402 mayreadily be separated from chassis 70. In the particular exampleillustrated, plug portion 408 and corresponding plug portion 410 areseparated. If, however, it is desired to move first object 402 intoengagement with chassis 70, pinion gear 416 is moved into engagementwith pinion gear reception portion 420, and handle 428 is pivoted in thedirection of arrow 438 to the retain position, as shown in FIG. 20. Ashandle 428 is moved to the retain position, first object 402 is moved ina precise, linear fashion into engagement with chassis 70. In theexemplary embodiment shown, corresponding plug portion 410 is movedlinearly into engagement with plug portion 408.

[0090] A latch mechanism 440 preferably is used to retain handle 428 andpinion gear 416 in the retain position. As illustrated best in FIG. 19,latch mechanism 440 includes a base 442 that may be connected to firstobject 402. A spring member 444 is connected to base 442 and serves tobias a catch 446 away from base 442. Additionally, a handle or fingergrip 448 is disposed on a distal end of spring member 444.

[0091] As handle 428 is rotated from the release position (FIG. 18) tothe closed position (FIG. 20), gripping portion 432 flexes spring member444 towards base 442. Simultaneously, spring member 436 is moved againstan interference surface 450 that is typically located on first object402. Upon movement of the handle 428 to the fully closed or retainposition, catch 446 snaps into notch 434 and maintains handle 428 andpinion gear 416 in the retain position.

[0092] To release handle 428, latch mechanism 440 is moved out ofinterference with notch 434 by pressing against finger grip 448 to flexspring member 444 towards base 442. (See FIG. 21). When catch 446 isdisengaged from notch 434, spring member 436 begins to move handle 428away from the retain position. This allows an operator to grab grippingportion 432 or stem 430 to pivot handle 428 and pinion gear 416 to arelease position. As pinion gear 416 is rotated to the release position,it moves first object 402 in a linear fashion with respect to chassis 70to disengage connector 406 or to serve other desired ends.

[0093] The configuration and operation of pinion gear 416 and piniongear reception portion 420 can be better understood with additionalreference to FIGS. 22, 23 and 24. Pinion gear reception portion 420includes a base structure 452 having an outer surface 454 and an innermounting surface or region 456 disposed generally opposite outer surface454. Mounting region 456 generally abuts against or is integrally formedwith chassis 70.

[0094] Slot 426 is formed in base structure 452 and is defined by aninterior surface 458. Interior surface 458 includes a rack gear region460 having at least one and preferably two teeth 462 that form a rackgear. Interior surface 458 also includes a distal surface 464 thatgenerally extends between rack gear region 460 and a guide surface 466disposed generally opposite rack gear region 460. Distal surface 464generally defines the deepest region of slot 426 relative to its openend. Preferably, interior surface 452 also includes a beveled lead-inregion 468 adjacent guide surface 466 at the open end of slot 426.

[0095] Pinion gear 416 includes at least one and preferably a pair ofteeth 470 designed to engage teeth 462 of rack gear region 460. As firstobject 402 and pinion gear 416 are moved into engagement with piniongear reception portion 420 and chassis 70 (see FIG. 18), teeth 470 arepositioned for engagement with teeth 462 of rack gear 460. Then, ashandle 428 is pivoted to the retain position (see FIG. 20), teeth 470 ofpinion gear 416 drive first object 402 in a linear fashion along linearrack gear region 460 until pinion gear 416 and handle 428 are in theretain position. At this position, the engagement of teeth 470 and teeth462 prevent any linear motion of pinion gear 416 or first object 402relative to chassis 70 along rack gear region 460, i.e. along thex-axis, as illustrated in FIG. 22. Additionally, pinion gear 416includes a distal region 472 that abuts against distal surface 464 ofreception portion 420 when pinion gear 416 is in the retain position.This abutting engagement further prevents any movement in the xdirection. Pinion gear 416 also includes a stop surface 474 disposedgenerally opposite teeth 470 for abutting engagement with guide surface466 of reception portion 420 when pinion gear 416 is in the retainposition. The guide surface 466 cooperates with rack gear region 460 toprevent any relative linear motion of pinion gear 416 or first object402 in a direction perpendicular to rack gear region 460, i.e. along they-axis, as illustrated in FIG. 22.

[0096] Preferably, lever system 414 also includes a lateral interferenceregion 476. This region is designed to prevent lateral movement ofpinion gear 416 with respect to reception portion 420 along pivot axis418, i.e. along the z-axis as illustrated in FIG. 22. A preferredlateral interference region includes a sloped or angled region 478disposed along interior surface 458 of pinion gear reception portion420. A corresponding sloped or angled region 480 is formed along anouter surface 482 of pinion gear 416. (See FIG. 24). The lateralinterference region 476 may be formed generally at distal region 472 ofpinion gear 416 and along distal surface 464 of reception portion 420.It should be noted, however, that the interference region can be formedat different points or in different forms to prevent lateral movementalong the z-axis direction.

[0097] The unique combination of interfering teeth and surfaces betweenpinion gear 416 and pinion gear reception portion 420 prevents anylinear motion of pinion gear 416 relative to reception portion 420 oncepinion gear 416 and handle 428 are in the retain position. This ensuresa secure and stable interlocking of first object 402 and chassis 70. Thesecure interlock is particularly beneficial when using the lever systemto secure pluggable components having multipin connectors.

[0098] As illustrated in FIG. 24, pinion gear 416 also preferablyincludes a pivot opening 484 to permit pivotable motion of pinion gear416 and handle 428 about a pivot pin 486. The illustrated pivot pin 486is a screw threaded into first object 402. However, a variety of pivotpins including injection molded pins, can be used in forming a point ofpivotable motion.

[0099] Referring generally to FIGS. 25 and 26, lever system 414 also mayinclude a release prevention mechanism 488 that prevents the inadvertentrelease of handle 428 from latch mechanism 440. An exemplary embodimentof security mechanism 488 includes a shaft 490 having a head 492 at oneend and a cog 494 at an opposite end. Typically, shaft 490 is rotatablymounted in either first object 402 or chassis 70 such that cog 494 ispositioned adjacent the side of latch mechanism 440, as illustrated bestin FIG. 25. In this embodiment, latch mechanism 440 includes a flexibletab 496 that moves generally transversely to the movement of springmember 444 and catch 446. Flexible tab 496 is sized to fit behind catch446 when catch 446 is engaged with notch 434 of handle 428.

[0100] Cog 494 includes an extended portion 498 positioned to forceflexible tab 496 into the space behind catch 446, as illustrated best inFIG. 26. Thus, by rotating head 492 in a generally clockwise direction(after handle 428 and latch mechanism 440 are in the retain position),the flexible tab 496 is moved into a position to block movement offinger grip 448 and release of handle 428. To release handle 428,extended portion 498 must be rotated away from flexible tab 496, suchthat flexible tab 496 springs back from its interfering position withcatch 446. Then, finger grip 448 and catch 446 may be moved to permitrelease of handle 428.

[0101] Referring generally to FIGS. 27 through 32, in the illustratedembodiment of a processor-based device, a plurality of circuit boardsare used to electrically couple various components withinprocessor-based device 68. For example, each memory cartridge may becoupled to a memory riser board 500, illustrated in FIG. 27. Memoryriser board 500 is, in turn, coupled to a host board 502, illustrated inFIG. 28. Additionally, two processor boards 504 are coupled to a hostboard 502. Host board 502 is coupled to a midplane board 506,illustrated in FIGS. 30 and 31. Additionally, an IO board 508,illustrated in FIG. 32, is coupled to midplane board 506.

[0102] Referring generally to FIG. 27, each connector 222 on each memorycartridge is matingly engaged with a corresponding electrical connector510 on memory riser board 500. Memory riser board 500 also has an edgeconnector 512 configured for mating engagement with a correspondingconnector on host board 502.

[0103] Referring generally to FIG. 28, electrical connector 514 on hostboard 502 is configured for mating engagement with edge connector 512 onmemory riser board 500. In the illustrated embodiment, two hostcontrollers 516 are disposed on host board 502. Host board 502 also hastwo electrical connectors 518 configured for connecting processor boards504 to host board 502. Finally, host board 502 also has an electricalconnector 520 configured for mating engagement with a correspondingelectrical connector on midplane board 506.

[0104] Host controllers 516 control the operation of the processor-baseddevice's memory system. The host controllers 516 are coupled through thehost board 502 and riser board 500 to the memory controllers 578 in thememory cartridges. The memory controllers control the transfer of datato and from the memory modules within a memory cartridge.

[0105] Host controllers 516 control the flow of data to and from thememory controllers. Additionally, the host controllers control the flowof data from the memory system to the processing portions of the device.In the exemplary embodiment, host controllers 516 are used to produce aredundant data storage memory. The same data is stored in more than onememory cartridge so that a memory cartridge may be removed without theloss of data. When a removed memory cartridge is reinstalled within thesystem, the host controllers direct the transfer of data into the memorycartridge to rebuild the redundant data storage. Additionally, althoughtwo host controllers 516 are featured in the illustrated embodiment, agreater or lesser munber of host controllers may be used.

[0106] Additionally, a memory system error checking and correctingalgorithm is used to detect errors in the transfer of data. For example,an error checking and correcting algorithm may be used to detect errorsin the transferring of data between a memory controller and a memorymodule and/or between a memory controller and the host controller.

[0107] Referring generally to FIG. 29, each processor board 504 has aconnector 522 configured for mating engagement with electricalconnectors 518 on host board 502. In the illustrated embodiment, eachprocessor board 504 has four sockets 524 for the installation of fourprocessor modules. The processor board couples the processors to thememory system and other components within the device.

[0108] Referring generally to FIG. 30, on one side of midplane board 506is an electrical connector 526 configured for mating engagement withelectrical connector 520 on host board 502. Additionally, midplane board506 has an electrical connector 528 configured for engagement with mediamodule 76.

[0109] Referring generally to FIG. 31, additional electrical connectorsare located on the opposite side of midplane board 506. An electricalconnector 530 is configured for mating engagement with IO board 508.Additionally, the illustrated embodiment of midplane board 506 has twoelectrical connectors 532 configured for mating engagement with twoelectrical power supplies.

[0110] Referring generally to FIG. 32, an exemplary IO board 508 has anelectrical connector 534 configured for engagement with electricalconnector 530 on midplane board 506. In the illustrated embodiment, IOboard 508 has 11 PCI slots 536 for installing PCI cards. Additionally,IO board 508 is configured with fan connectors 538 designed for matingengagement with each fan module 124. IO board 508 also has a pluralityof IO connectors, as best illustrated in FIG. 33. The exemplary IOconnectors comprise a SCSI connector 540, a video connector 542, akeyboard connector 544, a mouse connector 546, and a serial port 548. IOboard 508 also has an internal SCSI bypass cable connector 550.

[0111] As illustrated in FIG. 34, an exemplary embodiment ofprocessor-based device 68 is configured so that the memory cartridgesare hot-pluggable, i.e., the memory cartridges may be installed andremoved from chassis 70 without having to secure power toprocessor-based device 68 or to halt the operation of processor-baseddevice 68. A memory hot plug interface system 552 controls the power toeach memory cartridge 78.

[0112] In the illustrated embodiment, memory hot plug interface 552utilizes various inputs and programmable logic arrays (PALs) 554 tocontrol power to each memory cartridge 78. PAL arrangement 554 receivesinput from several sources. In the illustrated embodiment, female pins556 on the cartridge connector 210 are configured to matingly engagemale pins 558 on riser board connector 510 and to provide informationfrom each memory cartridge 78. For example, an insertion/removal sensor(IRS) and a pre-insertion/removal notification sensor (PIRN) are used toprovide inputs to the system. Additionally, a memory system errorchecking and correcting algorithm is used to detect errors in theoperation of the memory system.

[0113] A PIRN switch 560 is coupled to each operator 292 to provide aninput based on the position of operator 292, e.g., a locked or unlockedposition. PIRN switch 560 has a plurality of electrical terminals 561.The position of operator 292 defines the electrical properties of PIRNswitch 560 between each terminal 561. The terminals 561 are used toprovide an input to alarm and indicating system 570. PIRN switch 560 maybe disposed on a memory cartridge 78 to engage a portion of processorand media module 74 or on a portion of processor and media module 74 toengage a portion of memory cartridge 78.

[0114] A power controller 562 supplies power to each memory cartridgethrough connector 510 on the memory riser board and connector 222 oneach memory cartridge. The operation of power controller 562 iscontrolled by PAL arrangement 554. PAL arrangement 554 controls theoperation of power controller 562 based on the inputs to the PALarrangement 554 and the internal programming of PAL arrangement 554.

[0115] The insertion/removal sensor (IRS) may utilize pin 564 and pin566 to detect when a memory cartridge is being installed or removed. Forexample, pin 564 may be made shorter relative to pins 558. Additionally,pin 566 may be made longer than pins 558. Thus, during insertion of amemory cartridge 78, pin 566 would come into contact with a femalesocket 556 before pin 564 or 558. Additionally, during removal of amemory cartridge 78, pin 566 would remain in contact with a femalesocket 556 longer than would pins 564 or 558. This information may beused by system 552 to determine when installation or removal of acartridge 78 has started and when it has been completed.

[0116] Referring generally to FIG. 35, processor-based device 68 alsouses sensors as part of an alarm and indication system 570. In theillustrated embodiment, alarm and indication system 570 also utilizesPAL arrangement 554. In this embodiment, PAL arrangement 554 utilizesone system PAL (SYSPAL) 572 and five memory cartridge specific PALs 574(M3PAL), one M3PAL for each memory cartridge. Alarm and indicationsystem 570 identifies operating conditions and initiates an alarm and/orvarious visual and/or audible indications when specific operatingconditions exist.

[0117] In the illustrated embodiment, one series of inputs to alarm andindication system 570 is provided by five PIRN switches 560, one foreach memory cartridge 78. The PIRN switches provide an input toestablish whether a memory cartridge is in a secured or unsecuredposition. Another series of inputs are error signals provided by thehost controllers 516. Host controllers 516 receive memory error signalsfrom memory controllers 578 disposed with each of the five memorycartridges 78. Host controllers 516 determine if the memory errorsignals indicate a fault condition and provides a fault condition signalto each M3PAL 574. Additionally, host controllers 516 are also operableto establish if there is an error in data transferred between the memorycontrollers 578 and the host controllers 576. An error checking andcorrecting algorithm may be used to identify errors in datacommunication. An alarm or indication is provided when the inputscorrespond to programmed error conditions stored in the PAL arrangement554.

[0118] One feature of alarm and indication system 570 is an audiblealarm 580 to provide audible error condition messages to an operator. Inthis illustrated embodiment, alarm 580 receives an input from hostcontroller 576. For example, system 570 may respond with 2 long beeps ifthere are no valid banks of memory available to the system ROM during aninitial system test. Additionally, audible alarm 580 may sound tocaution the user that an improper action has occurred, is occurring orwill occur. This enables a user to stop an improper course of actionand/or reverse previous actions.

[0119] In this embodiment, various conditions may cause the memorycaution alarm to emit a continuous tone. First, system 570 may beconfigured to initiate the alarm when positioning the wrong memorycartridge operator 292 to an UNLOCK position. This can occur when one ofthe memory cartridges requires attention, e.g., is not online, butanother memory cartridge is unlocked. System 570 may be configured sothat returning the errant operator 292 to a LOCK position discontinuesthe alarm. Also, system 570 may be configured so that positioning thecartridge locking switch 292 to a LOCK position during system operationwhile the cartridge is removed triggers the alarm. An exemplary system570 discontinues the alarm when this condition is corrected byimmediately positioning the operator 292 to an UNLOCK position.

[0120] Other system indications are also provided by alarm andindication system 570. One indication is a cartridge power (CP) LED 582.In this embodiment each CP LED 582 is disposed on a circuit board withinchassis 70. The light from CP LED 582 is coupled by an optical fiber tofront 80 of processor-based device 68 where the light is illuminated asCP light 100. However, device 68 may also be configured with each CP LED582 disposed directly on front 80. Alternatively, alarm and indicationsystem 570 may energize an incandescent lamp, or some other illuminationmeans other than an LED.

[0121] CP LED 582 may be configured to inform the user of various memorycartridge operating conditions. For example, the CP LED 582 may informan operator when the cartridge is powered on, off, or in standby, whenan error condition exists such that the cartridge is not online, whenthe system is on and the cartridge is locked in place and no cartridgeerrors are present, or when the cartridge is undergoing a memory rebuildand verify. There is one CP LED 582 for each memory cartridge 78. Inthis embodiment, each CP LED 582 is green and has a blinking capability.Exemplary states of operation of a CP LED 582, the definition of each CPLED operating state, the conditions causing the CP LED operating state,the mechanisms that produce a change in the CP LED operating state andthe resulting CP LED state are provided in FIG. 36.

[0122] Another indication provided by alarm and indication system 570 isa cartridge attention (CA) LED 584. Each CA LED 584 is optically coupledto a CA light 102 on front 80 of device 68 to inform the user ofcartridge specific conditions that require user attention. For example,the CA LED may indicate a power fault detected; a memory cartridgeinterface failure: an error condition detected by the error checking andcorrecting algorithm on the MNET bus: or a memory cartridge not lockedin place, eg. for a memory cartridge that cannot be removed hot.

[0123] In the illustrated embodiment, there is one CA LED 584 for eachmemory cartridge 78. In this embodiment, CA LED 584 is amber in colorand has the capability of blinking. Exemplary CA LED operating states,the definition of each CA LED operating state, the conditions causingthe CA LED operating state, the mechanisms that produce a change in theCA LED state and the resulting CA LED state are provided in FIG. 37.

[0124] Still another set of indications that may be provided by alarmand indication system 570 are DIMM status LEDs 586. There are 8 DIMMstatus LEDs 586 for each memory cartridge in this embodiment, one foreach memory boardholder in a memory cartridge. Each DIMM status LED 586is optically coupled to a DIMM status light 104 on front 80 of device68. On front 80, each DIMM status light 104 is numbered 1 through 8 torepresent memory elements 1 through 8. The DIMM status LEDs 586 mayinform an operator of a variety of operating conditions. For example,the DIMM status LEDs may inform the operator that a DIMM is operatingnormally or when a DIMM socket is empty. The DIMM status LEDs 586 alsomay inform the user when a specific DIMM is installed in a boardholderbut is not available, e.g., when a hot add or upgrade is in progress, ifan error condition is detected by the memory checking and correctingalgorithm between a DIMM and a memory controller, if a DIMMconfiguration error condition exists or if a DIMM bank-specificcondition exists.

[0125] In this embodiment each DIMM status LED 104 is amber in color.Exemplary DIMM status LED states, the definition of each DIMM status LEDstate, the conditions causing the DIMM status LED state, the mechanismsthat produce a change in the DIMM status LED state and the resultingDIMM status LED state are provided in FIG. 38.

[0126] Unique combinations of the cartridge power, cartridge attention,and DIMM status LEDs may used to identify specific memory operatingstates. For example, a CP LED being on and various DIMM status LEDs alsobeing on may indicate that the memory cartridge is normal but that theDIMMs or a bank of DIMMs have a problem. Various examples of unique LEDcombinations, their definitions, conditions, and LED state changemechanisms are provided in FIG. 39.

[0127] Additionally, in this embodiment the various indications arestill provided even after a memory cartridge is removed. Because the PALarrangement 554 and the LEDs are disposed within the chassis, they arenot affected by removal of a memory cartridge. This feature enables arepair technician to identify a faulty DIMM by referring to the DIMMstatus LEDs 586 after a memory cartridge having a faulty DIMM isremoved. This feature may also be achieved by configuring a memorycartridge with visual indicators of DIMM status and a portable powersupply, e.g., battery, to operate the DIMM status indicators.

[0128] A number of alternative configurations of alarm and indicationsystem 570 are possible. For example, alarm and indication system 570may be configured with a set of status lights for each memory cartridge78 and a set of DIMM status LEDs, one for each memory slot, that may beshifted between memory cartridges to identify the specific memorycartridge and the specific DIMM, thus reducing the total number ofindications.

[0129] Processor-based device 68 also has additional modular componentsthat may be quickly and easily removed from chassis 70 without the useof tools. Referring generally to FIG. 40, each hard drive 82 may beremoved and installed from front 80 of chassis 70. Additionally, themodular nature of device 68 enables device 68 to be assembled in rack94. This eases assembly by removing the need for lifting the entireweight of device 68 to install device 68 in rack 94. As best illustratedin FIG. 41, chassis 70 initially may be placed in rack 94. Modularcomponents may then be installed into chassis 70. Some modular elements,such as power supplies 602, may be installed through rear 604 of device68 before installing chassis 70 in rack 94. However, even with therear-mounted items installed in chassis 70 prior to installing chassis70, the weight of chassis 70 still is substantially less than if all ofthe components of device 68 were installed prior to lifting.

[0130] One example of a modular component is processor and media module74, again illustrated in FIG. 42. Additionally, media cartridges 78 maybe added after chassis 70 is secured. Media module 76 also may beinstalled in chassis 70 after chassis 70 is installed in a rack system.

[0131] It will be understood that the foregoing description is of apreferred embodiment of this invention, and that the invention is notlimited to the specific forms shown. For example, the number of memorycartridges or memory elements within each memory cartridge may be moreor less than the numbers described above. These and other modificationsmay be made in the design and arrangement of the elements withoutdeparting from the scope of the invention as expressed in the appendedclaims.

What is claimed is:
 1. An electronic device, comprising: a chassis; aprocessor housed within the chassis; and a plurality of memorycartridges securable to the chassis and electrically coupleable to theprocessor, at least one memory cartridge being removable from thechassis during operation of the device.
 2. The device as recited inclaim 1, wherein the at least one memory cartridge is removable from thedevice when a defined set of operating conditions is present, the devicefurther comprising an indication system to inform an operator when thedefined set of operating conditions is or is not present.
 3. The deviceas recited in claim 2, wherein the indication system comprises an alarmsystem to provide an audible indication when the defined set ofoperating conditions are not present during an attempt to remove amemory cartridge from the chassis.
 4. The device as recited in claim 1,wherein each of the plurality of memory cartridges is removable from thechassis from the front of the device.
 5. The device as recited in claim1, wherein each of the plurality of memory cartridges is installed orremoved from the chassis by a lever system.
 6. The device as recited inclaim 1, wherein the plurality of memory cartridges are electricallycoupleable to form a memory system to redundantly store data.
 7. Thedevice as recited in claim 1, wherein the memory system comprises aplurality of memory modules that are securable within each of theplurality of memory cartridges.
 8. The device as recited in claim 7,wherein the memory modules are industry standard dual inline memorymodules (DIMMs).
 9. The device as recited in claim 8, wherein the memorysystem comprises a plurality of memory controllers, each memorycontroller being electrically coupleable to at least one DIMM.
 10. Thedevice as recited in claim 9, wherein a memory controller is disposedwithin each of the plurality of memory cartridges.
 11. The device asrecited in claim 10, wherein the memory system comprises a hostcontroller disposed within the chassis, further wherein a memorycontroller within a memory cartridge is coupled to the host controllerwhen the respective memory cartridge is secured within the chassis. 12.The device as recited in claim 7, further comprising an indicationsystem operable to provide an indication of memory system operation. 13.The device as recited in claim 12, wherein the indication system isoperable to provide an operator with an indication of at least oneoperating condition for each of the plurality of memory cartridges. 14.The system as recited in claim 12, wherein the indication system isoperable to provide an indication of an error condition associated witha specific memory module housed within a memory cartridge.
 15. Thedevice as recited in claim 14, wherein the indication system continuesto provide the indication of an error condition after the memorycartridge housing the specific memory module is removed from thechassis.
 16. The device as recited in claim 12, wherein the indicationsystem is operable to indicate the memory cartridge is operatingnormally.
 17. The device as recited in claim 12, wherein the indicationsystem is operable to indicate a memory cartridge is not operating withthe memory system.
 18. The device as recited in claim 12, wherein theindication system is operable to indicate the device is performing arebuild of memory within a memory cartridge.
 19. The device as recitedin claim 12, wherein the indication system is operable to indicate powerfault within a memory cartridge.
 20. The device as recited in claim 12,wherein the indication system is operable to indicate an error in datatransferred between a memory controller and a host controller.
 21. Thedevice as recited in claim 12, wherein the indication system is operableto indicate a memory cartridge is installed within a chassis but notsecured within the chassis.
 22. The device as recited in claim 12,wherein the indication system is operable to indicate an error in datatransferred between a memory module and a memory controller.
 23. Thedevice as recited in claim 12, wherein the indication system is operableto indicate of at least one operating condition for each of theplurality of memory modules.
 24. The device as recited in claim 12,wherein the indication system is operable to indicate a memory module isoperating normally.
 25. The device as recited in claim 12, wherein theindication system is operable to indicate an error in the configurationof memory modules within a memory cartridge.
 26. The device as recitedin claim 12, wherein the indication system is operable to indicate amemory module is installed but not in operation with the memory system.27. The device as recited in claim 1, further comprising a plurality ofsecuring members, each securing member being operable to secure a memorycartridge to the chassis.
 28. The device as recited in claim 27, furthercomprising a locking mechanism to prevent a secured memory cartridgefrom being unsecured.
 29. The device as recited in claim 12, furthercomprising a plurality of securing members to secure the plurality ofmemory cartridges to the chassis, wherein each of the plurality ofsecuring members is operable to provide an input to the indicationsystem.
 30. The device as recited in claim 1, further comprising aplurality of lever systems, wherein each lever system comprises: apinion gear pivotably mounted to a memory cartridge for pivotable motionabout a pivot axis; a single handle connected to the pinion gear formovement between a release position and a retain position; and a piniongear reception portion secured to the chassis, the pinion gear receptionportion having a rack gear and a guide surface generally opposite therack gear, wherein the guide surface is located to maintain the piniongear in engagement with the rack gear as the handle is moved from therelease position to the retain position.
 31. The device as recited inclaim 30, wherein the pinion gear includes at least one tooth disposedto ensure movement of the pivot axis generally along a straight line asthe handle is moved between the release position and the retainposition.
 32. The device as recited in claim 30, wherein the pinion gearreception portion includes a lateral interference region to preventlateral movement of the pinion gear along the pivot axis with respect tothe pinion gear reception portion.
 33. The device as recited in claim32, wherein the lateral interference region includes a tapered surfacedisposed at an angle with respect to the pivot axis when the pinion gearis engaged with the pinion gear reception portion.
 34. The device asrecited in claim 33, wherein the pinion gear includes a tapered stopsurface disposed to engage the tapered surface when the handle is in theclosed position.
 35. The device as recited in claim 30, wherein eachmemory cartridge comprises a first electrical connector and the chassiscomprises a second electrical connector, the first electrical connectorand second electrical connector being configured for mating engagement,wherein the first and second electrical connectors are engaged when thehandle is positioned in the retain position and the first and secondelectrical connectors are disengaged when the handle is positioned inthe release position.
 36. The device as recited in claim 1, wherein eachof the plurality of memory cartridges comprises: a protective assemblyto prevent inadvertent engagement between a memory module and anexternal object when the memory cartridge is removed from the chassis;and a memory module holder secured to the protective assembly.
 37. Theassembly as recited in claim 36, wherein the memory module holder isoperable to secure a memory module to the protective assembly at anangle relative to the protective assembly.
 38. The device as recited inclaim 37, wherein the angle is an acute angle.
 39. The assembly asrecited in claim 36, wherein each memory module holder is configured tosecure a dual inline memory module (DIMM) to the protective assembly.40. The assembly as recited in claim 36, wherein the protective assemblycomprises a pivotable cover.
 41. An electrical device, comprising: achassis; a plurality of memory cartridges removable from the chassis,each memory cartridge being adapted to house at least one memory module;and a plurality of gear systems, each of the plurality of gear systemsbeing operable to install or remove a memory cartridge from the front ofthe device.
 42. The device as recited in claim 41, wherein each gearsystem comprises: a gear member mounted to a memory cartridge; and agear member reception portion mounted to the chassis, wherein as thegear member and the gear member reception portion are engaged androtated with respect to each other, the gear member may be moved to aretained position at which linear movement is restricted in alldirections.
 43. The device as recited in claim 42, further comprising ahandle connected to the gear member to pivot the gear member between aretain position and a release position.
 44. The device as recited inclaim 43, wherein the gear member comprises a pinion gear having atleast one tooth.
 45. The device as recited in claim 44 wherein thepinion gear is pivotably mounted to the memory cartridge about a pivotaxis.
 46. The device as recited in claim 41, wherein at least one memorycartridge is removable from the chassis without securing operation ofthe device.
 47. The device as recited in claim 46, further comprising anaudible alarm to inform an operator when an improper condition existsduring removal of a memory cartridge.
 48. The device as recited in claim41, further comprising a plurality of securing members to secure theplurality of memory cartridges to the chassis.
 49. The device as recitedin claim 46, further comprising a memory system, the memory systemcomprising a plurality of memory modules, a plurality of memorycontrollers and at least one host controller.
 50. The device as recitedin claim 49, wherein the memory system stores data redundantly so thatno data is lost when a memory cartridge is removed from the chassis. 51.The device as recited in claim 49, wherein each memory module is anindustry standard dual inline memory module (DIMM).
 52. The device asrecited in claim 49, wherein each memory cartridge has a memorycontroller disposed therein.
 53. The device as recited in claim 52,wherein the host controller is disposed within the chassis.
 54. Thedevice as recited in claim 49, further comprising an indication systemto inform an operator of a memory system operating condition.
 55. Thedevice as recited in claim 54, wherein the indication system is operableto indicate an error condition associated with a specific memory module.56. The device as recited in claim 55, wherein the indication system isoperable to continue to provide the indication of an error conditionassociated with a specific memory module after the specific memorycartridge housing the specific memory module is removed from thechassis.
 57. The device as recited in claim 56, wherein the indicatorsystem comprises a visual indicator disposed on the chassis.
 58. Thedevice as recited in claim 54, wherein the indication system is operableto indicate the memory cartridge is operating normally.
 59. The deviceas recited in claim 54, wherein the indication system is operable toindicate a memory cartridge is offline from the memory system.
 60. Thedevice as recited in claim 54, wherein the indication system is operableto indicate the device is performing a memory rebuild of a memorycartridge.
 61. The device as recited in claim 54, wherein the indicationsystem is operable to indicate there is a fault in power within a memorycartridge.
 62. The device as recited in claim 54, wherein the indicationsystem is operable to indicate an error in data transferred between amemory controller and a host controller.
 63. The device as recited inclaim 54, wherein the indication system is operable to indicate a memorycartridge is installed within a chassis but not secured within thechassis.
 64. The device as recited in claim 54, wherein the indicationsystem is operable to indicate an error in data transferred between amemory module and a memory controller.
 65. The device as recited inclaim 54, wherein the indication system is operable to indicate at leastone operating condition for each of the plurality of memory modules. 66.The device as recited in claim 54, wherein the indication system isoperable to indicate a memory module is operating normally.
 67. Thedevice as recited in claim 54, wherein the indication system is operableto indicate an error in the configuration of memory modules within amemory cartridge.
 68. The device as recited in claim 54, wherein theindication system is operable to indicate a memory module is installedbut unavailable for operation.
 69. The device as recited in claim 54,wherein each memory cartridge is secured to the chassis by a securingmember, wherein each of the plurality of securing members provides aninput to the indication system.
 70. The device as recited in claim 69,wherein each securing member comprises an electric switch.
 71. Thedevice as recited in claim 41, wherein each of the plurality of memorycartridges comprise: a protective housing; a plurality of memory moduleholders, each memory module holder being configured to secure arespective memory module to the protective housing; and a memorycontroller.
 72. The device as recited in claim 71, wherein each of theplurality of memory module holders are configured to secure a memorymodule to the protective housing at an acute angle.
 73. The device asrecited in claim 71, wherein the protective housing comprises a base anda pivotable cover.
 74. The device as recited in claim 41, furthercomprising a locking mechanism to prevent the removal of a memorycartridge.
 75. The device as recited in claim 41, further comprising aninterlock, wherein the interlock prevents a memory cartridge from beingremoved from the chassis unless conditions for removal are satisfied.76. An electronic device, comprising: an enclosure; a processor; amemory system comprising a plurality of removable memory cartridgeselectrically coupleable to the processor; and an indication system toprovide an indication of at least one operating condition of the memorysystem.
 77. The device as recited in claim 76, wherein at least onememory cartridge is removable from the enclosure without securing powerto the device.
 78. The device as recited in claim 76, wherein theindication system is operable to indicate an error condition associatedwith each of the plurality of memory cartridges.
 79. The device asrecited in claim 78, wherein the indication system is operable toprovide the indication of an error condition associated with a specificmemory cartridge after the specific memory cartridge is removed.
 80. Thedevice as recited in claim 76, wherein each of the plurality of memorycartridges are removable from the front of the device.
 81. The device asrecited in claim 76, wherein the memory system comprises a plurality ofmemory modules disposed within each of the memory cartridges.
 82. Thedevice as recited in claim 81, wherein the memory system furthercomprises a memory controller disposed within each memory cartridge anda host controller disposed within the enclosure.
 83. The device asrecited in claim 81, wherein the memory modules are industry standarddual inline memory modules (DIMMs).
 84. The device as recited in claim81, wherein each memory controller is electrically coupled to a firstelectrical connector and the host controller is electrically coupled toa plurality of second electrical connectors, each second electricalconnector being configured for mating engagement with a correspondingfirst electrical connector.
 85. The device as recited in claim 78,wherein the indication system is operable to indicate a specific memorymodule experiencing an error condition.
 86. The device as recited inclaim 85, wherein the indication system is operable to indicate an errorcondition associated with a specific memory module after the specificmemory cartridge housing the specific memory module is removed from theenclosure.
 87. The device as recited in claim 76, wherein the indicationsystem is operable to indicate at least one operating condition for eachof the plurality of memory cartridges.
 88. The device as recited inclaim 87, wherein the indication system is operable to indicate a memorycartridge is operating normally.
 89. The device as recited in claim 87,wherein the indication system is operable to indicate a memory cartridgeis offline.
 90. The device as recited in claim 87, wherein theindication system is operable to indicate the device is rebuilding thememory within a memory cartridge.
 91. The device as recited in claim 87,wherein the indication system is operable to indicate there is a faultin power provided to operate a memory cartridge.
 92. The device asrecited in claim 82, wherein the indication system is operable toindicate an error in data transferred between a memory controller and ahost controller.
 93. The device as recited in claim 76, wherein theindication system is operable to indicate a memory cartridge isinstalled within a chassis but that the memory cartridge is not securedwithin the chassis.
 94. The device as recited in claim 82, wherein theindication system is operable to indicatean error in data transferredbetween a memory module and a memory controller.
 95. The device asrecited in claim 81, wherein the indication system is operable toindicate at least one operating condition for each of the plurality ofmemory modules.
 96. The device as recited in claim 95, wherein theindication system is operable to indicate a memory module is operatingnormally.
 97. The device as recited in claim 81, wherein the indicationsystem is operable to indicate a configuration error associated with amemory module within a memory cartridge.
 98. The device as recited inclaim 87, wherein the indication system is operable to indicate a memorymodule is installed but unavailable for operation.
 99. The system asrecited in claim 76, wherein the indication system comprises an alarmsystem to sound when an improper operating condition exists.
 100. Thesystem as recited in claim 76, wherein each of the plurality of memorycartridges is installed or removed from the chassis by a lever and gearsystem.
 101. The system as recited in claim 76, further comprising aplurality of securing members to secure the plurality of memorycartridges to the enclosure.
 102. The system as recited in claim 101,wherein each of the plurality of securing members is used to provide aninput to the indication system.
 103. The device as recited in claim 76,wherein each of the plurality of memory cartridges comprises aprotective chassis configured to prevent damage to a memory moduledisposed therein when the memory cartridge is removed from the enclosure.
 104. The system as recited in claim 76, wherein the electronic deviceis a server.
 105. A method of operating a processor-based device,comprising: storing data in a memory system comprising a plurality ofmemory modules disposed within a plurality of removable memorycartridges; and operating the memory system to store data redundantlyamong the plurality of memory cartridges, wherein at least one memorycartridge may be removed from the device without halting the operationof the device.
 106. The method as recited in claim 105, whereinoperating comprises removing at least one memory cartridge from thedevice when proper operating conditions exist for removal of the atleast one memory cartridge.
 107. The method as recited in claim 106,wherein operating comprises configuring the processor-based device withan indication system to indicate to an operator whether the properoperating conditions exist prior to an attempt to remove the at leastone memory cartridge from the device.
 108. The method as recited inclaim 106, wherein operating comprises configuring the processor-baseddevice with an alarm system to emit an audible alarm if the properoperating conditions does not exist during an attempt to remove the atleast one memory cartridge from the processor-based device.
 109. Themethod as recited in claim 105, wherein operating comprises operating asingle-handle lever system to remove the at least one memory cartridge.110. The method as recited in claim 105, further comprising: removingthe at least one memory cartridge to add an additional memory module tothe memory cartridge.
 111. The method as recited in claim 105, furthercomprising: removing the at least one memory cartridge to repair the atleast one memory cartridge.
 112. The method as recited in claim 105,further comprising: providing an operator with an indication of memorysystem operation.
 113. The method as recited in claim 105, furthercomprising: providing an operator with an audible and visual indicationof memory system operation.
 114. The method as recited in claim 112,wherein providing comprises providing an indication of at least oneoperating condition for each of the plurality of memory cartridges. 115.The method as recited in claim 112, wherein providing comprisesproviding an indication of an error condition associated with a specificmemory module housed within a memory cartridge.
 116. The method asrecited in claim 112, wherein providing comprises providing anindication that a memory cartridge is operating normally.
 117. Themethod as recited in claim 112, wherein providing comprises providing anindication that a memory cartridge is offline from the memory system.118. The method as recited in claim 112, wherein providing comprisesproviding an indication that the device is performing a memory rebuildof memory modules within a memory cartridge.
 119. The method as recitedin claim 112, wherein providing is a fault in power provided within amemory cartridge.
 120. The method as recited in claim 112, whereinproviding comprises providing an indication of an error in datatransferred between a memory controller and a host controller.
 121. Themethod as recited in claim 112, wherein providing comprises providing anoperator with an indication that a memory cartridge is installed withina chassis but that the memory cartridge is not secured within thechassis.
 122. The method as recited in claim 112, wherein providingcomprises providing an operator with an indication of an error in datatransferred between a memory module and a memory controller.
 123. Themethod as recited in claim 112, wherein providing comprises providing anoperator with an indication that a memory module is operating normally.124. The method as recited in claim 112, wherein providing comprisesproviding an operator with an indication of an error in theconfiguration of memory modules within a memory cartridge.
 125. Themethod as recited in claim 112, wherein providing comprises providing anoperator with an indication that a memory module is installed butunavailable for operation.
 126. A processor-based device, comprising:means for storing data in a memory system comprising at least one memorymodule disposed within a plurality of removable memory cartridges; andmeans for operating the memory system to store data redundantly amongthe plurality of memory cartridges, wherein at least one memorycartridge may be removed from the device without securing operation ofthe device.
 127. The device as recited in claim 126, further comprising:means for removing the at least one memory cartridge from the front ofthe device.
 128. A method of assembling an electronic device,comprising: securing a chassis to a mounting device; and inserting aplurality of memory cartridges housing industry standard dual inlinememory modules into the chassis from the front of the electronic device.